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Let's get a few things straight -- there aren't any 1,000 processors on the horizon, there's no such chip on Intel's processor roadmap, and we've yet to really tap into the computing power of today's multi-core architectures. Got it? Great, let's move on.
Despite the above disclaimers, Intel engineer Timothy Mattson was more than willing to sit and talk with ZDNet about what it would take to build such a monstrous CPU. Here's some of what he had to say:
"The challenge this presents to those of us in parallel computing at Intel is, if our fabs could build a 1,000-core chip, do we have an architecture in hand that could scale that far? And if built, could that chip be effectively programmed?
"The architecture used on the 48-core chip could indeed fit that bill. I say that since we don't have cache coherency overhead. Message-passing applications tend to scale at worst as the diameter of the network, which runs roughly as the square root of the number of nodes on the network. So I can say with confidence we could scale the architecture used on the SCC to 1,000 cores."
Mattson went on to say that as far as programming goes, that too is feasible "as a cluster on a chip using a message-passing API."
Read more of what he had to say here.
Image Credit: Intel
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Despite the above disclaimers, Intel engineer Timothy Mattson was more than willing to sit and talk with ZDNet about what it would take to build such a monstrous CPU. Here's some of what he had to say:
"The challenge this presents to those of us in parallel computing at Intel is, if our fabs could build a 1,000-core chip, do we have an architecture in hand that could scale that far? And if built, could that chip be effectively programmed?
"The architecture used on the 48-core chip could indeed fit that bill. I say that since we don't have cache coherency overhead. Message-passing applications tend to scale at worst as the diameter of the network, which runs roughly as the square root of the number of nodes on the network. So I can say with confidence we could scale the architecture used on the SCC to 1,000 cores."
Mattson went on to say that as far as programming goes, that too is feasible "as a cluster on a chip using a message-passing API."
Read more of what he had to say here.
Image Credit: Intel
More...